
Intelligent Graphics Display
AND1781MST/BST
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
7/20/07
Tel: 408.523.8200 • Fax: 408.733.1287 • email@purdyelectronics.com • www.purdyelectronics.com
3
Timing Relationships and Diagram
Timing Diagram
Block Diagram
Dimensional Outline
Signal Timing Relationships
Item Symbol Min. Max. Unit
C/D Set Up Time
t
CDS
100 –
ns
C/D Hold Time
t
CDH
10 –
CE
,
RD
,
WR
Pulse Width
t
CE
, t
RD
, t
WR
80 –
Data Set Up Time
t
DS
80 –
Data Hold Time
t
DH
40 –
Access Time
t
ACC
– 150
Output Hold Time
t
OH
10 50
t
CDS
t
CP
,t
RD
,t
WP
t
ACC
t
CDH
t
DH
t
OH
t
DS
C/D
CE
RD, WR
D0-D7
(WRITE)
D0-D7
(READ)
LP
RV
D0–D7
WR
RD
CE
C/
D
RESET
T6963C
D0–D7
A0–A7
R/W
CE
V
FL
RAM
(8K byte)
Y-Driver
LCD Panel
240 x 64 Dots
FL Backlight
Revers
e
X-Driver X-DriverX-Driver
CDAT
HSC
ED
64
80 80 80
8
13
FS
V
FL
Reserve
Line
20-ø1.0 (Through Hole)
20-ø1.6 (Land)
4-R1.75
2.54±0.3
Reference Line
127.17 (Active Area)
2
20
1
22.86±0.3 13.0±0.5
2.54±0.3
131.0±0.3 (Viewing Area)
137.0±0.3 (Bezel Opening)
158.8±0.5
176.0±0.3
70.0±0.5
24.42±0.5
22.5±0.5
19.5±0.5
8.6±0.5
2.0±0.5
180.0±0.5
50.0±0.3
44.0±0.3
38.0±0.3
33.89
14.5±0.5
5.0±0.5
8.0±0.5
10.06±0.5
2.54±0.3
1.6±0.3
130±10
CN
14.0 Max
7.5±0.5
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